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74LVC1G53GD Scheda tecnica(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74LVC1G53GD Scheda tecnica(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 27 page ![]() 74LVC1G53 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 10 — 7 December 2016 12 of 27 NXP Semiconductors 74LVC1G53 2-channel analog multiplexer/demultiplexer 11.1 Waveforms and test circuits Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 16. Input (Yn or Z) to output (Z or Yn) propagation delays Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 17. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 2.7 V 0.5 V CC 0.5 V CC VOL +0.15V VOH 0.15 V 2.7 V to 5.5 V 0.5 V CC 0.5 V CC VOL +0.3 V VOH 0.3 V |
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