PSD501B1 datasheet(13/153 Pages) STMICROELECTRONICS

13 / 153 page

Pin Name

Pin Function

Type

Function Descriptions

PE0

Port PE, pin 0

I/O

Multiple functions

1. BHE

1. High byte enable, 16 bit data

2. PSEN

2. Read program memory, 8031 signal

3. WRH

write high data byte

4. UDS

4. Upper Data Strobe

5. SIZ0

5. Byte enable, 68300 signal

6. PE0

6. I/O pin

7. PE0

7. ZPLD I/O pin

8. PE0

8. Latched Address Out – A0

PE1

Port PE, pin 1

I/O

Multiple functions

1. ALE

1. Address strobe

2. PE1

2. I/O pin

3. PE1

3. ZPLD I/O pin

4. PE1

4. Latched Address Out – A1

PE2

Port PE, pin 2

Multiple functions

1. Intr Out

1. Interrupt Controller Output

2. PE2

I/O

2. I/O pin

3. PE2

3. ZPLD I/O pin

4. PE2

4. Latched Address Out – A2

PE3

Port PE, pin 3

Multiple functions

1. Timer0-In

1. Timer0 control input

2. PE3

I/O

2. I/O pin

3. PE3

3. ZPLD I/O pin

4. PE3

4. Latched Address Out – A3

PE4

Port PE, pin 4

Multiple functions

1. Timer1-In

1. Timer1 control input

2. PE4

I/O

2. I/O pin

3. PE4

3. ZPLD I/O pin

4. PE4

4. Latched Address Out – A4

5. TC0

5. Timer0 Terminal Count

PE5

Port PE, pin 5

Multiple functions

1. Timer2-In

1. Timer2 control input

2. PE5

I/O

2. I/O pin

3. PE5

3. ZPLD I/O pin

4. PE5

4. Latched Address Out – A5

5. TC1

5. Timer1 Terminal Count

PE6

Port PE, pin 6

Multiple functions

1. Timer3-In

1. Timer3 control input

2. PE6

I/O

2. I/O pin

3. PE6

3. ZPLD I/O pin

4. PE6

4. Latched Address Out – A6

5. TC2

5. Timer2 Terminal Count

PE7

Port PE, pin 7

Multiple functions

1. APD CLK

1. Automatic Power Down Clock Input

2. PE7

I/O

2. I/O pin

3. PE7

3. ZPLD I/O pin

4. PE7

4. Latched Address Out – A7

5. TC3

5. Timer3 Terminal Count

VSTBY

SRAM power pin for standby

operation (battery backup)

VCC

Chip VCC power pin

GND

Chip ground pin

PSD5XX Family

Table 2.

PSD5XX Pin

Descriptions

(Cont.)

PSD501B1 Scheda tecnica(PDF) 13 Page - STMicroelectronics

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