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ST10R167 Scheda tecnica(PDF) 60 Page - STMicroelectronics

Il numero della parte ST10R167
Spiegazioni elettronici  16-BIT ROMLESS MCU
PDF  63 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10R167 Scheda tecnica(HTML) 60 Page - STMicroelectronics

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XX.4.12 - External bus arbitration
VDD =5V ± 10%, VSS = 0V, TA = -40 to +125°C
CL (for Port0, Port1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100pF
CL (for Port 6, CS) = 100pF
Note
1. Guaranteed by design characterization.
Notes 1. The ST10C167 will complete the currently running bus cycle before granting bus access.
2. This is the first possibility for BREQ to become active.
3. The CS outputs will be resistive high (pullup) after
t
64.
Table 21 : External bus arbitration
Symbol
Parameter
Max. CPU Clock
= 25MHz
Variable CPU Clock
1/2TCL = 1 to 25MHz
Unit
Min.
Max.
Min.
Max.
t61
SR
HOLD input setup time to CLKOUT
20
–
20
–
ns
t62
CC
CLKOUT to HLDA hig or BREQ low delay
–
20
–
20
ns
t63
CC
CLKOUT to HLDA low or BREQ high delay
–
20
–
20
ns
t64
CC
CSx release
–1
20
–
20
ns
t65
CC
CSx drive
-4
24
-4
24
ns
t66
CC
Other signals release
–1
20
–
20
ns
t67
CC
Other signals drive
-4
24
-4
24
ns
Figure 23 : External bus arbitration, releasing the bus
CLKOUT
HOLD
t61
HLDA
t63
Other
Signals
t66
1)
CSx
(On P6.x)
t64
1)
2)
BREQ
t62
3)
XX - ELECTRICAL CHARACTERISTICS (continued)



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