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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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ST20CX Scheda tecnica(PDF) 82 Page - STMicroelectronics |
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ST20CX Scheda tecnica(HTML) 82 Page - STMicroelectronics |
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82 / 212 page  fmul ® 82/212 fmul fractional multiply Code: 27 F2 Description: Multiply Areg by Breg treating the values as fractions, rounding the result. The values in Areg and Breg are interpreted as fractions in the range greater than or equal to -1 and less than 1 - i.e. the integer values divided by 2BitsPerWord-1. The result is rounded. The rounding mode used is analogous to IEEE round nearest; that is the result produced is the fraction which is nearest to the exact product, and, in the event of the product being equidistant between two factions, the fraction with least significant bit 0 is produced. Definition: if (Areg = MostNeg) and (Breg = MostNeg) – MostNeg interpreted as -1 { Areg ′← undefined IntegerOverflow } else Areg ′← (Breg × Areg) / roundnearest 2 BitsPerWord-1 Breg ′← Creg Creg ← undefined Error signals: IntegerOverflow can occur. Comments: Secondar y instruction. |
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