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ST7263 Scheda tecnica(PDF) 54 Page - STMicroelectronics

Il numero della parte ST7263
Spiegazioni elettronici  LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C
PDF  109 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263 Scheda tecnica(HTML) 54 Page - STMicroelectronics

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5.5 SERIAL COMMUNICATIONS INTERFACE (SCI)
5.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format.
5.5.2 Main Features
s
Full duplex, asynchronous communications
s
NRZ standard format (Mark/Space)
s
Independently
programmable
transmit
and
receive baud rates up to 250K baud.
s
Programmable data word length (8 or 9 bits)
s
Receive buffer full, Transmit buffer empty and
End of Transmission flags
s
Two receiver wake-up modes:
– Address bit (MSB)
– Idle line
s
Muting function for multiprocessor configurations
s
Separate
enable
bits for Transmitter and
Receiver
s
Three error detection flags:
– Overrun error
– Noise error
– Frame error
s
Five interrupt sources with flags:
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error detected
5.5.3 General Description
The interface is externally connected to another
device by two pins (see Figure 1):
– TDO: Transmit Data Output. When the transmit-
ter is disabled, the output pin returns to its I/O
port configuration. When the transmitter is ena-
bled and nothing is to be transmitted, the TDO
pin is at high level.
– RDI: Receive Data Input is the serial data input.
Oversampling techniques are used for data re-
covery by discriminating between valid incoming
data and noise.
Through this pins, serial data is transmitted and re-
ceived as frames comprising:
– An Idle Line prior to transmission or reception
– A start bit
– A data word (8 or 9 bits) least significant bit first
– A Stop bit indicating that the frame is complete.



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