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ST75C540 Scheda tecnica(PDF) 50 Page - STMicroelectronics

Il numero della parte ST75C540
Spiegazioni elettronici  SUPER INTEGRATED DEVICESWITH DSP, AFE & MEMORIES FORTELEPHONY,MODEM, FAXOVERINTERNET& POTSLINES
PDF  84 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST75C540 Scheda tecnica(HTML) 50 Page - STMicroelectronics

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Transmit
SCR1
Data
T10
T11 min
STA_H
P1s
PNs
PRs
SCR1s
Receive
T13
STA_HR
STA_109F
PRDETs
PNSUCs
STA_109
RxData
PNs
PNDETs
(3)
P2s
T12
(3)
(3)
(3)
(6)
Mode
T10
T11
T12
T13
Unit
V.17
13
20
8
25
ms
V.17 short
13
20
8
25
ms
V.29
13
20
8
25
ms
V.29 short
13
20
8
25
ms
V.27 4800
20
30
8
25
ms
V.27 4800 short
20
30
8
25
ms
V.27 2400
27
40
8
25
ms
V.27 2400 short
27
40
8
25
ms
Notes : 1.
In the case of V.29 or V.27, PRs and PRDETs bits are not active.
2.
PNSUCs indicates the quality of the Rx signal that will give a ber of approximation of 1e
-5.
3.
After sending the command SYNC0, all bits are reset.
4.
When using long echo protection tone, otherwise 0.
5.
When using short echo protection tone, otherwise 0.
6.
STA-106 is set at the end of T6 and reset at the beginning of T10.
7.
After sending the command SYNC1, this bit is set.
8.
PNSUC is evaluated twice, first at SCR1 detection and further 256 baud (V.29, V.17, V.33 : 106ms ; V .27 4800bps : 160ms ;
V.27 2400bps : 212ms) after STA_109.
9.
For V.21 channel 2, timing for loss of STA_109 is 25ms and timing for detection of STA_109 is 7ms.
10.
For V.21 channel 2 after a STOP command, STA_H is set to “1” during 13ms when the last HDLC flag is transmitted.
VIII - STATUS DESCRIPTION (continued)
ST75C530 - ST75C540
50/84



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