ST90R40C6 datasheet(17/56 Pages) STMICROELECTRONICS

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Symbol

Parameter

Value (Note)

Unit

OSCIN Divided

By 2

OSCIN Not Divided

By 2

Min. Max.

TsA (AS)

Address Set-up Time

before AS

↑

TpC (2P+1) –22

TWCH+PTpC –18

ThAS (A)

Address Hold Time after AS

↑

TpC –17

TwCL –13

TdAS (DR)

↑ toData Available (read)

TpC (4P+2W+4) –52

TpC (2P+W+2) –51

115

TwAS

AS Low Pulse Width

TpC (2P+1) –7

TwCH+PTpC –3

TdAz (DS)

Address Float to DS

↓ t12

TwDSR

DS Low Pulse Width (read)

TpC (4P+2W+3) –20

TwCH+TpC

(2P+W+1) –16

105

TwDSW

DS Low Pulse Width (write)

TpC (2P+2W+2) –13

TpC (P+W+1) –13

TdDSR (DR)

↓ toData Valid Delay (read)

TpC (4P+2W-3) –50

TwCH+TpC(2P+W+1)

–46

ThDR (DS)

Data to DS

↑ Hold Time (read)

TdDS (A)

↑ to Address Active Delay

TpC –7

TwCL –3

TdDS (AS)

↑ to AS ↓ Delay

TpC –18

TwCL –14

TsR/W (AS)

R/W Set-up Time before AS

↑

TpC (2P+1) –22

TwCH+PTpC –18

TdDSR (R/W)

↑ to R/W and Address Not

Valid Delay

TpC –9

TwCL –5

TdDW (DSW)

Write Data Valid to DS

↓ Delay

(write)

TpC (2P+1) –32

TwCH+PTpC –28

ThDS (DW)

Data Hold Time after DS

↑ (write) TpC –9

TwCL –5

TdA (DR)

Address Valid to Data Valid

Delay (read)

TpC (6P+2W+5) –68

TwCH+TpC

(3P+W+2) –64

140

TdAs (DS)

↑ to DS ↓ Delay

TpC –18

TwCL –14

EXTERNAL BUS TIMING TABLE

(VDD =5V

± 10%,TA =– 40 °Cto + 85 °C, Cload = 50pF, CPUCLK = 12MHz, unless otherwise specified)

EXTERNAL WAIT TIMING TABLE

(VDD =5V

± 10%,TA =–40°Cto +85°C, Cload = 50pF,

INTCLK = 12MHz, Push-pull output configuration, unless otherwise specified)

Symbol

Parameter

Value (Note)

Unit

OSCIN Divided

By 2

OSCIN Not Divided

By 2

Min. Max.

TdAs (WAIT)

↑ to WAIT ↓ Delay

2(P+1)TpC –29

TdAs (WAIT)

↑ to WAIT ↓ Min. Delay

2(P+W+1)TpC –4

TdAs (WAIT)

↑ to WAIT ↓ Max. Delay

2(P+W+1)TpC –29

83W+

Note: (for both tables) The value in the left hand two columns show the formula used to calculate the timing minimum or maximum from the

oscillator clock period, prescale value and number of wait cycles inserted.

The value in the right hand two columns show the timing minimum and maximum for an external clock at 24 MHz divided by 2, prescaler value

of zero and zero wait status.

Legend:

TpC =OSCIN Period

P = Clock Prescaling Value

TwCH =High Level OSCIN half period

W = Wait Cycles

TwCL =Low Level OSCIN half period

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