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ST93C56 Scheda tecnica(PDF) 4 Page - STMicroelectronics

Il numero della parte ST93C56
Spiegazioni elettronici  2K 128 x 16 or 256 x 8 SERIAL MICROWIRE EEPROM
PDF  13 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST93C56 Scheda tecnica(HTML) 4 Page - STMicroelectronics

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background image
Symbol
Alt
Parameter
Test Condition
Min
Max
Unit
tSHCH
tCSS
Chip Select High to Clock High
50
ns
tCLSH
tSKS
Clock Low to Chip Select High
100
ns
tDVCH
tDIS
Input Valid to Clock High
100
ns
tCHDX
tDIH
Clock High to Input Transition
Temp. Range: grade 1
100
ns
Temp. Range:
grades 3, 6
200
ns
tCHQL
tPD0
Clock High to Output Low
500
ns
tCHQV
tPD1
Clock High to Output Valid
500
ns
tCLSL
tCSH
Clock Low to Chip Select Low
0
ns
tSLCH
Chip Select Low to Clock High
250
ns
tSLSH
tCS
Chip Select Low to Chip Select High
Note 1
250
ns
tSHQV
tSV
Chip Select High to Output Valid
500
ns
tSLQZ
tDF
Chip Select Low to Output Hi-Z
ST93C56
300
ns
ST93C56C, 57C
200
ns
tCHCL
tSKH
Clock High to Clock Low
Note 2
250
ns
tCLCH
tSKL
Clock Low to Clock High
Note 2
250
ns
tW
tWP
Erase/Write Cycle time
10
ms
fC
fSK
Clock Frequency
0
1
MHz
Notes: 1. Chip Select must be brought low for a minimum of 250 ns (tSLSH) between consecutive instruction cycles.
2. The Clock frequency specification calls for a minimum clock period of 1
µs, therefore the sum of the timings tCHCL +tCLCH
must be greater or equal to 1
µs. For example, if tCHCL is 250 ns, then tCLCH must be at least 750 ns.
Table 5. AC Characteristics
(TA = 0 to 70
°C or –40 to 85°C; VCC = 4.5V to 5.5V or 3V to 5.5V)
AI01428
C
OP CODE
OP CODE
START
S
D
OP CODE INPUT
START
tDVCH
tSHCH
tCLSH
tCHCL
tCLCH
tCHDX
Figure 4. Synchronous Timing, Start and Op-Code Input
4/13
ST93C56/56C, ST93C57C



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