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STB50NE10 Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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STB50NE10 Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 8 page ![]() STB50NE10 N - CHANNEL 100V - 0.021 Ω - 50A - D2PAK STripFET ™ POWER MOSFET s TYPICAL RDS(on) = 0.021 Ω s EXCEPTIONAL dv/dt CAPABILITY s 100% AVALANCHE TESTED s LOW GATE CHARGE AT 100 oC s APPLICATION ORIENTED CHARACTERIZATION s FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size ™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC & DC-AC CONVERTERS s AUTOMOTIVE ENVIRONMENT ® INTERNAL SCHEMATIC DIAGRAM December 1998 1 3 D 2PAK TO-263 (suffix ”T4”) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Un it VDS Drain-source Voltage (VGS = 0) 100 V VDGR Drain- gate Voltage (RGS =20 k Ω) 100 V VGS G ate-source Volt age ± 20 V ID Drain Current (continuous) at Tc =25 oC50 A ID Drain Current (continuous) at Tc =100 oC35 A IDM ( •) Drain Current (pulsed) 200 A Ptot T otal Dissipat ion at Tc =25 oC 150 W Derating Factor 1 W / o C dv/dt (1) Peak Diode Recovery voltage slope 6 V/ns Tstg Storage Temperature -65 to 175 o C Tj Max. Operating Junction Temperature 175 o C ( •) Pulse width limited by safe operating area ( 1)ISD ≤ 50 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS,Tj ≤ TJMAX TYPE VDSS RDS(on) ID STB50NE10 100 V <0.027 Ω 50 A 1/8 |
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