DSP56F826 datasheet(47/60 Pages) FREESCALE

Il numero della parte	DSP56F826

Spiegazioni elettronici	16-bit Digital Signal Controllers

PDF	60 Pages

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Produttore elettronici	FREESCALE [Freescale Semiconductor, Inc]

Homepage	http://www.freescale.com

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Quad Timer Timing

56F827 Technical Data, Rev. 12

Freescale Semiconductor

Figure 3-26 Slave Mode Clock Timing

3.12 Quad Timer Timing

Table 3-16 Timer Timing1, 2

Operating Conditions: VSSIO=VSS = VSSA = 0V, VDDA =VDDIO=3.0–3.6V, VDD = 2.25–2.75V, TA = –40° to +85°C, CL < 50pF, fop = 80MHz

In the formulas listed, T = clock cycle. For 80MHz operation, T = 12.5ns.

2. Parameters listed are guaranteed by design.

Characteristic

Symbol

Min

Max

Unit

Timer input period

4T+6

—

Timer input high/low period

PINHL

2T+3

—

Timer output period

POUT

—

Timer output high/low period

POUTHL

—

tTHS

tTSS

tHS

tSS

tRFSWLS

tRFSWHS

tRFBLS

tRFSBHS

tTXHIS

tTXNVS

tFTXVS

tTXVS

tFTXES

tTXES

tTFSWLS

tTFSWHS

tTFSBLS

tTFSBHS

tSCKL

tSCKW

tSCKH

First Bit

Last Bit

STCK input

STFS (bl) input

STFS (wl) input

STXD

SRCK input

SRFS (bl) input

SRFS (wl) input

SRXD

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