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ADE5566 Scheda tecnica(PDF) 25 Page - Analog Devices

Il numero della parte ADE5566
Spiegazioni elettronici  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
PDF  148 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADE5566 Scheda tecnica(HTML) 25 Page - Analog Devices

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Preliminary Technical Data
ADE5166/ADE5169/ADE5566/ADE5569
Rev. PrB | Page 25 of 148
POWER SUPPLY MANAGEMENT INTERRUPT (PSM)
The power supply management interrupt (PSM) alerts the 8052
core of power supply events. The PSM interrupt is disabled by
default. Setting the EPSM bit in the interrupt enable and
Priority 2 SFR (IEIP2, 0xA9) enables the PSM interrupt (see
Table 73).
The power management interrupt enable SFR (IPSME, 0xEC)
controls the events that result in a PSM interrupt (see Table 20).
Figure 11 is a diagram illustrating how the PSM interrupt vector
is shared among the PSM interrupt sources. The PSM interrupt
flags are latched and must be cleared by writing to the IPSMF flag
register (see Table 17).
EPSR
FPSR
ESAG
FSAG
EVADC
FVADC
EBAT
FBAT
EBSO
FBSO
EVDCIN
FVDCIN
FPSM
EPSM
TRUE?
PENDING PSM
INTERRUPT
EPSR
RESERVED
ESAG
RESERVED
EVADC
EBAT
EBSO
EVDCIN
FPSR
FPSM
FSAG
RESERVED
FVADC
FBAT
FBSO
FVDCIN
PS2
PTI
ES2
PSI
EADE
ETI
EPSM
ESI
IPSME ADDR. 0xEC
IPSMF ADDR. 0xF8
IEIP2 ADDR. 0xA9
NOT INVOLVED IN PSM INTERRUPT SIGNAL CHAIN
Figure 11. PSM Interrupt Sources



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