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STD40NF3LL Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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STD40NF3LL Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 6 page ![]() STD40NF3LL N-CHANNEL 30V - 0.0095 Ω - 40A DPAK LOW GATE CHARGE STripFET ™ POWER MOSFET PRELIMINARY DATA s TYPICAL RDS(on) = 0.0115 Ω @ 4.5V s OPTIMAL RDS(on) xQg TRADE-OFF @ 4.5V s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED DESCRIPTION This application specific Power Mosfet is the third generation of STMicroelectronics unique ”Single Feature Size ™” strip-based process. The resul- ting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high effi- ciency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ® INTERNAL SCHEMATIC DIAGRAM May 2000 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Un it VDS Drain-source Voltage (VGS =0) 30 V VDGR Drain- gate Voltage (RGS =20 k Ω)30 V VGS G ate-source Volt age ± 15 V ID Drain Current (continuous) at Tc =25 oC40 A ID Drain Current (continuous) at Tc =100 oC28 A IDM ( •) Drain Current (pulsed) 160 A Ptot T otal Dissipat ion at Tc =25 oC55 W Derating Factor 0.37 W / o C Tstg Storage Temperature -65 to 175 o C Tj Max. Operating Junction Temperature 175 o C ( •) Pulse width limited by safe operating area T YPE VDSS RDS(on ) ID STD40NF3LL 30 V < 0.0115 Ω 40 A ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL 1 3 DPAK TO-252 (Suffix ”T4”) 1/6 |
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