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C167CS-4RM Scheda tecnica(PDF) 38 Page - Infineon Technologies AG |
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C167CS-4RM Scheda tecnica(HTML) 38 Page - Infineon Technologies AG |
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38 / 517 page ![]() C167CS Derivatives Memory Organization User’s Manual 3-1 V2.0, 2000-07 3 Memory Organization The memory space of the C167CS is configured in a “Von Neumann” architecture. This means that code and data are accessed within the same linear address space. All of the physically separated memory areas, including internal ROM/Flash/OTP (where integrated), internal RAM, the internal Special Function Register Areas (SFRs and ESFRs), the address areas for integrated XBUS peripherals and external memory are mapped into one common address space. The C167CS provides a total addressable memory space of 16 MBytes. This address space is arranged as 256 segments of 64 KBytes each, and each segment is again subdivided into four data pages of 16 KBytes each (see Figure 3-1). Figure 3-1 Address Space Overview MCA04325 Begin of Prog. Memory above 32 KB 255 128 254...129 127 126...65 64 63 62...12 11 10 9 8 7 6 5 4 3 2 1 0 Internal ROM Area 00’0000 H 01’FFFF H 0A’FFFF H 40’0000 H 80’0000 H FF’FFFF H Data Page 2 Data Page 3 Alternate ROM Area 255...2 02’FFFF H 08’0000 H 00’0000 H 01’0000 H 01’8000 H 01’FFFF H Total Address Space 16 MByte, Segments 255...0 Segments 1 and 0 64 + 64 Kbyte |
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