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XC2000 Scheda tecnica(PDF) 95 Page - Infineon Technologies AG

Il numero della parte XC2000
Spiegazioni elettronici  16/32-Bit Single-Chip Microcontroller with 32-Bit Performance Volume 1 (of 2): Peripheral Units
PDF  647 Pages
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Produttore elettronici  INFINEON [Infineon Technologies AG]
Homepage  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

XC2000 Scheda tecnica(HTML) 95 Page - Infineon Technologies AG

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XC2000 Derivatives
System Units (Vol. 1 of 2)
Memory Organization
Preliminary
User’s Manual
3-33
V1.0, 2007-06
MemoryX2K, V1.1
“Reset to Read” command, it is interpreted as password and the reset is not executed.
The 16-bit passwords are internally compared with the keywords out of the “Security
Page 0”. If one or more passwords are not identical to their related keywords, the
protected sectors remain in the locked state and a protection error (PROER) is indicated
in the Flash status register. In this case, a new “Disable Read Protection” command or
a “Disable Write Protection” command is only accepted after the next Application
Reset.
Note: During execution of the “Disable Read” (or Write) Protection command a
password compare error is only indicated after all four passwords have been
compared with the related keywords.
Note: This command sequence is also used to check the correctness of keywords
before the protection is confirmed in the Security Page 1. A wrong keyword is
indicated by the IMB_FSR flag PROER.
After correct execution of this command, the whole flash memory is unlocked and the
read protection disable bit RPRODIS is set in the Flash Status Register (IMB_FSR).
Erase and program operations on all sectors are then possible, if the flash memory was
also globally write protected (WPA=1), and if they are not separately write protected. The
read protection (including global write protection, if so selected) remains disabled until
the command “Re-Enable Read/Write Protection” is executed, or until the next
Application Reset (including HW and SW reset).
Disable Write Protection
Arguments: PWD
Definition:
MOV XX3CH, XXXXH
MOV XX54H, PWD0
MOV XXAAH, PWD1
MOV XX54H, PWD2
MOV XXAAH, PWD3
MOV XX5AH, XX05H
Timing: 6-cycle command that does not set any busy flag.
Description: Disable temporarily the global flash write protection or/and the sector write
protection of all protected sectors. The WPA bit in IMB_IMBCTR is reset.
This is a protected command sequence, using four user defined passwords to release
this command (as described above for the “Disable Read Protection” command).
After correct execution of this command, all write-protected sectors are unlocked, which
is indicated in the Flash Status Register (IMB_FSR) with the WPRODIS bit. Erase and
program operations on all sectors are now possible, until
The command “Re-Enable Read/Write Protection” is executed, or



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