STLC1502 datasheet(14/81 Pages) STMICROELECTRONICS

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STLC1502

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present).

It is possible to connect every CSx to a Dual Port SRAM and use that as a communication mailbox between the

device and an external microprocessor. For example, the microprocessor can write a message in the memory

using one port and can send an interrupt to the device so that the execution routine related with that interrupt

can read from the other port of the memory connected to the same CSx of the ESM.

Viceversa, the ESM can write a message in the memory and then can send an interrupt to the external micro-

processor that will read the message from the other port of the memory.

The SRAM and the FLASH devices that are used as references are standard.

6.2.1 ESM address decoding scheme

The ESM block includes also a decoder in order to generate the proper CS to the external device. In particular

this decoder will work on the bit 22,23,24 and 25 of the internal ARM address bus.

ESM decoding scheme

6.2.2 ESM Register Map [0x0C600000]

The base address of the ESM register is 0x0C600000.

6.3 EDM interface

The EDM interface is used to access external DRAMs. This block supports both EDO and SDRAM interfaces

with enough flexibility to be used with several DRAM chips available in the market. This block has a separate

bus for control (the registers are placed on the APB bus) and for data (data and address are placed on the ASB

bus) and also includes an external bus interface that allows to share address and data bus pins with the static

ESM interface.

Figure 6 shows a block diagram of the EDM block.

ESM decoder

ESM_A(21:0)

Address

Name

R/W

Notes

ESMBase + 0x00

CS0

R/W

CS0 bank control

ESMBase + 0x04

CS1

R/W

CS1 bank control

ESMBase + 0x08

CS2

R/W

CS2 bank control

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