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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STDVE001ABTR Scheda tecnica(PDF) 41 Page - STMicroelectronics |
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STDVE001ABTR Scheda tecnica(HTML) 41 Page - STMicroelectronics |
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41 / 49 page  STDVE001A Application information 41/49 5.3.1 I2C lines application information A typical application is shown in the figure below. In the example, the system master is running on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz. Master devices can be placed on either bus. Figure 21. Typical application of I2C bus system The STDVE001A DDC lines are 5 V tolerant; so it does not require any extra circuitry to translate between the different bus voltages. 3.3V 5.0V SDA SCL SDA SCL SDA SDA SCL SCL STDVE001A BUS 0 BUS 1 Bus master 400 kHz Slave 100 kHz |
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