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L6722TR Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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L6722TR Scheda tecnica(HTML) 7 Page - STMicroelectronics |
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7 / 34 page ![]() L6722 2 Pins description and connection diagrams 7/34 2 Pins description and connection diagrams Figure 4. Pins connection (top view) 2.1 Pin description Table 1. Pins description Pin# Name Function 1 VSEN Remote Buffer Output. It manages OVP and UVP protections and PGOOD. See Section 9 for details. 2FB Error Amplifier Inverting Input. Connect with a resistor RFB vs. VSEN and with an RF - CF vs. COMP. 3COMP Error Amplifier Output. Connect with an RF - CF vs. FB. The device cannot be disabled by pulling down this pin. 4SGND All the internal references are referred to this pin. Connect to the PCB Signal Ground. 5VCC Device Power Supply as well as LS driver supply. Operative voltage is 12V ±15%. Filter with at least 1 µF MLCC vs. ground. 6 N.C. Not Internally Bonded. 7LGATE1 Channel 1 LS Driver Output. A small series resistor helps in reducing device-dissipated power. 8 PGND LS Driver return path. Connect to Power ground Plane. 21 22 23 24 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 PHASE3 N.C. PGOOD N.C. OSC / INH / FLT N.C. REF_IN REF_OUT N.C. LGATE2 PGND LGATE1 N.C. VCC SGND COMP FB VSEN 19 20 13 14 15 16 17 18 33 34 35 36 |
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