TS4995

Package information

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Package information

T

o meet environmental requirements, STMicroelectronics offers these devices in

category of second level interconnect is marked on the package and on the inner box label,

in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics

Figure 59.

9-bump flip-chip package mechanical drawing

Figure 60.

Tape and reel schematics

1.63 mm

1.63 mm

0.5mm

0.5mm

∅ 0.25mm

1.63 mm

1.63 mm

0.5mm

0.5mm

∅ 0.25mm

600µm

600µm

– Die size: 1.63mm x 1.63mm ± 30µm

– Die height (including bumps): 600µm

– Bumps diameter: 315µm ±50µm

– Bump diameter before reflow: 300µm ±10µm

– Bumps height: 250µm ±40µm

– Die height: 350µm ±20µm

– Pitch: 500µm ±50µm

– Coplanarity: 60µm max

User direction of feed

A

1

A

1

8

Die size X + 70µm

4

1.5

4

All dimensions are in mm

User direction of feed

A

1

A

1

8

Die size X + 70µm

4

1.5

4

All dimensions are in mm