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L6924U Scheda tecnica(PDF) 23 Page - STMicroelectronics |
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L6924U Scheda tecnica(HTML) 23 Page - STMicroelectronics |
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23 / 38 page ![]() L6924U Application information: monitoring and protection 23/38 8 Application information: monitoring and protection The L6924U uses a VFQFPN 3 mm x 3 mm 16-pin package with an exposed pad that allows the user to have a compact application and good thermal behavior at the same time. The L6924U has a low thermal resistance because of the exposed pad (approximately 75 °C/W, depending on the board characteristics). Moreover, a built-in thermal protection feature prevents the L6924U from having thermal issues typically present in a linear charger. Thermal control is implemented with a thermal loop that reduces the charge current automatically when the junction temperature reaches approximately 120 °C. This avoids further temperature rise and keeps the junction temperature constant. This simplifies the thermal design of the application as well as protects the device against over-temperature damage. The figure above shows how the thermal loop acts (with the dotted lines), when the junction temperature reaches 120 °C. Figure 16. Power dissipation both linear and quasi pulse mode with thermal loop |
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