Operation modes

M48T02, M48T12

8/24

The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are

the Address Inputs are changed while E and G remain active, output data will remain valid

Figure 4.

Read mode AC waveforms

Note:

WRITE Enable (W) = High.

Table 3.

Read mode AC characteristics

Symbol

1.

M48T02/M48T12

Unit

–70

–150

–200

Min

Max

Min

Max

Min

Max

READ Cycle Time

70

150

200

ns

Address Valid to Output Valid

70

150

200

ns

Chip Enable Low to Output Valid

70

150

200

ns

Output Enable Low to Output Valid

35

75

80

ns

Chip Enable Low to Output Transition

5

10

10

ns

Output Enable Low to Output Transition

5

5

5

ns

Chip Enable High to Output Hi-Z

25

35

40

ns

Output Enable High to Output Hi-Z

25

35

40

ns

Address Transition to Output Transition

10

5

5

ns

AI01330

tAVAV

tAVQV

tAXQX

tELQV

tELQX

tEHQZ

tGLQV

tGLQX

tGHQZ

VALID

A0-A10

E

G

DQ0-DQ7

VALID