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M48Z129V Scheda tecnica(PDF) 4 Page - STMicroelectronics |
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M48Z129V Scheda tecnica(HTML) 4 Page - STMicroelectronics |
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4 / 16 page ![]() M48Z129Y*, M48Z129V 4/16 SUMMARY DESCRIPTION The M48Z129Y/V ZEROPOWER® SRAM is a 1,048,576 bit non-volatile static RAM organized as 131,072 words by 8 bits. The device combines an internal lithium battery, a CMOS SRAM and a con- trol circuit in a plastic 32-pin DIP Module. The M48Z129Y/V directly replaces industry standard 128K x 8 SRAM. It also provides the non-volatility of FLASH without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. Figure 2. Logic Diagram Table 1. Signal Names Figure 3. DIP Connections AI02309 17 A0-A16 DQ0-DQ7 VCC M48Z129Y M48Z129V G VSS 8 E W RST BL A0-A16 Address Inputs DQ0-DQ7 Data Inputs / Outputs E Chip Enable G Output Enable W WRITE Enable RST Reset Output (Open Drain) BL Battery Low Output (Open Drain) VCC Supply Voltage VSS Ground A1 A0 DQ0 A7 A4 A3 A2 A6 A5 A13 A10 A8 A9 DQ7 A15 A11 G E DQ5 DQ1 DQ2 DQ3 VSS DQ4 DQ6 A16 RST VCC AI02310 M48Z129Y M48Z129V 10 1 2 5 6 7 8 9 11 12 13 14 15 16 30 29 26 25 24 23 22 21 20 19 18 17 A12 A14 W BL 3 4 28 27 32 31 |
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