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ECP2 Scheda tecnica(PDF) 104 Page - Lattice Semiconductor |
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ECP2 Scheda tecnica(HTML) 104 Page - Lattice Semiconductor |
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104 / 386 page ![]() 4-3 Pinout Information Lattice Semiconductor LatticeECP2/M Family Data Sheet [LOC]_SQ_VCCIBm — Input buffer power supply, channel m (1.2V/1.5V). This pin should be left float- ing if the channel is unused. [LOC]_SQ_VCCOBm — Output buffer power supply, channel m (1.2V/1.5V). This pin should be left floating if the channel is unused. [LOC]_SQ_HDOUTNm O High-speed output, negative channel m [LOC]_SQ_HDOUTPm O High-speed output, positive channel m [LOC]_SQ_HDINNm I High-speed input, negative channel m [LOC]_SQ_HDINPm I High-speed input, positive channel m [LOC]_SQ_VCCTXm 4 — Transmitter power supply, channel m (1.2V). This pin must be tied to 1.2V even if the channel is unused. [LOC]_SQ_VCCRXm 4 — Receiver power supply, channel m (1.2V). This pin must be tied to 1.2V even if the channel is unused. 1. These signals are relevant for LatticeECP2M family. 2. m defines the associated channel in the Quad. 3. These signals are defined in Quads [LOC] indicates the corner SERDES Quad is located: ULC (upper left), URC (upper right), LLC (lower left), LRC (lower right). 4. When placing switching I/Os around these critical pins that are designed to supply the device with the proper reference or supply voltage, care must be given. For more information, refer to technical note TN1159, LatticeECP2/M Pin Assignment Recommendations. Signal Descriptions (Cont.) Signal Name I/O Description |
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