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STP3NC70ZFP Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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STP3NC70ZFP Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() 1/10 June 2001 STP3NC70Z STP3NC70ZFP N-CHANNEL 700V - 4.1 Ω - 2.5A TO-220/TO-220FP Zener-Protected PowerMESH™III MOSFET (1) ISD ≤2.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (*) Limited by Maximum Temperature allowed s TYPICAL RDS(on) = 4.1Ω s EXTREMELY HIGH dv/dt AND CAPABILITY GATE TO - SOURCE ZENER DIODES s 100% AVALANCHE TESTED s VERY LOW GATE INPUT RESISTANCE s GATE CHARGE MINIMIZED DESCRIPTION The third generation of MESH OVERLAY™ Power MOSFETs for very high voltage exhibits unsur- passed on-resistance per unit area while integrat- ing back-to-back Zener diodes between gate and source. Such arrangement gives extra ESD capa- bility with higher ruggedness performance as re- quested by a large variety of single-switch applications. APPLICATIONS s SINGLE-ENDED SMPS IN MONITORS, COMPUTER AND INDUSTRIAL APPLICATION s WELDING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STP3NC70Z STP3NC70ZFP 700V 700V < 4.7 Ω < 4.7 Ω 2.5 A 2.5 A Symbol Parameter Value Unit STP3NC70Z STP3NC70ZFP VDS Drain-source Voltage (VGS = 0) 700 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 700 V VGS Gate- source Voltage ± 25 V ID Drain Current (continuos) at TC = 25°C 2.5 2.5 (*) A ID Drain Current (continuos) at TC = 100°C 1.6 1.6 (*) A IDM (q) Drain Current (pulsed) 10 10 A PTOT Total Dissipation at TC = 25°C 65 35 W Derating Factor 0.52 0.28 W/°C IGS Gate-source Current (DC) ±50 mA VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5K Ω) 1.5 KV dv/dt (1) Peak Diode Recovery voltage slope 3 V/ns VISO Insulation Withstand Voltage (DC) - 2500 V Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C TO-220 1 2 3 TO-220FP |
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