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P5NB100FP Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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P5NB100FP Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 9 page  STP5NB100 STP5NB100FP N - CHANNEL 1000V - 2.4 Ω - 5A - TO-220/TO-220FP PowerMESH ™ MOSFET ν TYPICAL RDS(on) = 2.4 Ω ν EXTREMELY HIGH dv/dt CAPABILITY ν 100% AVALANCHE TESTED ν VERY LOW INTRINSIC CAPACITANCES ν GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage MESH OVERLAY ™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS ν HIGH CURRENT, HIGH SPEED SWITCHING ν SWITCH MODE POWER SUPPLIES (SMPS) ν DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ® INTERNAL SCHEMATIC DIAGRAM February 2000 TO-220 TO-220FP 1 2 3 1 2 3 ABSOLUTE MAXIMUM RATINGS Symb ol Parameter Value Uni t ST P5NB100 STP5NB100FP VDS Drain-source Voltage (VGS =0) 1000 V VDGR Drain- gate Voltage (RGS =20 k Ω) 1000 V VGS G ate-source Voltage ± 30 V ID Drain Current (continuous) at Tc =25 oC 5 5(*) A ID Drain Current (continuous) at Tc =100 oC 3.1 3.1(*) A IDM( •) Drain Current (pulsed) 15.2 15. 2 A Ptot T otal Dissipat ion at Tc =25 oC 135 40 W Derat ing Factor 1.08 0.32 W/ oC dv/dt (1) Peak Diode Recovery voltage slope 4.5 4.5 V/ ns VISO I nsulat ion W ithst and Voltage (DC) 2000 V Tstg Storage Temperature -65 to 150 oC Tj Max. Operat ing Junction Temperature 150 oC ( •) Pulse width limited by safe operating area (1)ISD ≤ 5 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS,Tj ≤ TJMAX (*) Limited only by maximum temperature allowed T YPE VDSS RDS(on) ID STP5NB100 STP5NB100F P 1000 V 1000 V <2.7 Ω <2.7 Ω 5A 5A 1/9 |
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