ST62T08CL3 datasheet(26/104 Pages) STMICROELECTRONICS

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RESET (Cont’d)

5.3.4 Watchdog Reset

The MCU provides a Watchdog timer function in

order to be able to recover from software hang-

ups. If the Watchdog register is not refreshed be-

fore an end-of-count condition is reached, a

Watchdog reset is generated.

After a Watchdog reset, the MCU restarts in the

same way as if a Reset was generated by the RE-

SET pin.

Note: When a watchdog reset occurs, the RESET

pin is tied low for very short time period, to flag the

reset phase. This time is not long enough to reset

external circuits.

For more details refer to the Watchdog Timer

chapter.

5.3.5 LVD Reset

Two different RESET sequences caused by the in-

ternal LVD circuitry can be distinguished:

Power-On RESET

Voltage Drop RESET

During an LVD reset, the RESET pin is pulled low

when VDD<VIT+ (rising edge) or VDD<VIT- (falling

edge).

For more details, refer to the LVD chapter.

Caution: Do not externally connect directly the

RESET pin to V

DD, this may cause damage to the

component in case of internal RESET (Watchdog

or LVD).

Figure 15. Simple External Reset Circuitry

Figure 16. Reset Processing

ST62xx

RESET

VDD

Typical: R = 10K

C = 10nF

R > 4.7 K

INT LATCH CLEARED

NMI MASK SET

(IF PRESENT)

SELECT

NMI MODE FLAGS

IS RESET STILL

PRESENT?

YES

PUT FFEh

ON ADDRESS BUS

FROM RESET LOCATIONS

FFEh/FFFh

FETCH INSTRUCTION

LOAD PC

INTERNAL

RESET

2048

CLOCK CYCLE

DELAY

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