L6756D datasheet(25/36 Pages) STMICROELECTRONICS

Il numero della parte	L6756D

Spiegazioni elettronici	2/3/4 phase buck controller for VR10, VR11 and VR11.1 processor applications

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L6756D

Output voltage positioning

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5.6.1

LSLESS start-up

In order to avoid any kind of negative undershoot on the load side during start-up, L6756D

performs a special sequence in enabling the drivers for both sections: during the soft-start

phase, the LS driver results to be disabled (LS = OFF - Gx set to HiZ and DRVON = 0) until

the first PWM pulse. After the first PWM pulse, Gx outputs switches between logic “0” and

logic “1” and DRVON is set to logic “1”.

This particular sequence avoids the dangerous negative spike on the output voltage that

can happen if starting over a pre-biased output.

Low-side MOSFET turn-on is masked only from the control loop point of view: protections

are still allowed to turn-ON the low-side MOSFET in case of overvoltage if needed.

Figure 10.

LSLESS start-up: enabled (left) and disabled (right)

L6756D Scheda tecnica(PDF) 25 Page - STMicroelectronics