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M41ST87YMX6 Scheda tecnica(PDF) 24 Page - STMicroelectronics

Il numero della parte M41ST87YMX6
Spiegazioni elettronici  5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
PDF  48 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M41ST87YMX6 Scheda tecnica(HTML) 24 Page - STMicroelectronics

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Operating modes
M41ST87Y, M41ST87W
24/48
Table 5.
Tamper detect timing
Figure 19.
RAM clear hardware hookup
1.
Most inverting charge pumps drive OUT to ground when device shut down is enabled (SHDN = logic low). Therefore, an n-
channel enhancement mode MOSFET should be used to isolate the OUT pin from the VOUT of the M41ST87.
2.
In order to avoid turning on an on-chip parasitic diode when driving VOUT negative, a p-channel enhancement mode
MOSFET should be used to isolate the VOUT pin from the negative voltage generated by the inverting charge pump.
2.7
Tamper detection operation
The tamper pins are triggered based on the state of an external switch. Two switch mode
options are available, “normally open” or “normally closed,” based on the setting of the
Symbol
Parameter
CLRPW
1
CLRPW
0
Min
Typ
Max
Unit
tCLRD
(1)
1.
With input capacitance = 70 pF and resistance = 50
Ω.
Tamper RAM clear ext delay
X
X
1.0(2)
2.
If the OF bit is set, tCLRD(min) = 0.5 ms.
1.5
2.0
ms
tCLR
Tamper clear timing
00
1
s
01
4
s
10
8
s
11
16
s
AI07804
VCC
PFO1
EX
SCL
M41ST87Y/W
WDI
RSTIN1
RSTIN2
PFI1
PFI2
VSS
VBAT
F32k
IRQ/OUT
SQW/FT
RST
VOUT
ECON
SDA
CAP+ CAP–
Inverting
Charge
Pump
SHDN
OUT
IN
TP1IN
TPCLR
TP2IN
Pushbutton
Reset
PFO2
Low-Power
SRAM
VCC
Negative Output
(–1 x VIN)
E
To RST
To LED Display
(2)
(1)
To NMI
To INT
To 32kHz
Inhibit
5V
Regulator
VCC
VIN



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