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6V7 Scheda tecnica(PDF) 28 Page - Renesas Technology Corp |
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6V7 Scheda tecnica(HTML) 28 Page - Renesas Technology Corp |
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28 / 298 page ![]() Rev.1.00 May 18, 2004 page 28 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP P00 to P07 I/O port Single-chip mode Memory expansion mode/microprocessor modes Data bus width BYTE pin level Port P40 to P43 function select bit = 0 16 bits = “L” 8 bits = “H” Processor mode CS (chip select) or programmable I/O port (For details, refer to “2.4.4 Bus control”) Outputs RD, WRL, WRH, and BCLK or RD, BHE, WR, and BCLK (For details, refer to “2.4.4 Bus control”) Port P40 to P43 function select bit = 1 P10 to P17 I/O port P21 to P27 I/O port P20 I/O port P30 I/O port P31 to P37 I/O port P40 to P43 I/O port P40 to P43 I/O port P44 to P47 I/O port P50 to P53 I/O port P54 I/O port P55 I/O port P56 I/O port P57 I/O port Data busData bus I/O port Data bus Address bus Address bus Address bus Address bus Address bus Address bus Address busAddress bus I/O port I/O port Address bus Address bus HLDA HLDA HOLD HOLD ALE ALE RDY RDY Table 2.4.2 Pin functions for each processor mode |
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