M34283G2GP datasheet(9/64 Pages) RENESAS

9 / 64 page

Rev.1.01

Mar 20, 2006

page 9 of 62

REJ03B0109-0101

4283 Group

Fig. 7 Program counter (PC) structure

Fig. 8 Data pointer (DP) structure

Fig. 9 SD instruction execution example

(8) Program counter (PC)

Program counter (PC) is used to specify a ROM address (page

and address). It determines a sequence in which instructions

stored in ROM are read. It is a binary counter that increments

the number of instruction bytes each time an instruction is

executed. However, the value changes to a specified address

when branch instructions, subroutine call instructions, return

instructions, or the table reference instruction (TABP p) is

executed.

Program counter consists of PCH (most significant bit to bit 7)

which specifies to a ROM page and PCL (bits 6 to 0) which

specifies an address within a page. After it reaches the last

address (address 127) of a page, it specifies address 0 of the

next page (Figure 7).

Make sure that the PCH does not exceed after the last page of

the built-in ROM.

(9) Data pointer (DP)

Data pointer (DP) is used to specify a RAM address and

consists of registers X and Y. Register X specifies a file and

When using port D, set the port D bit position to register Y

certainly and execute the SD, RD, or SZD instruction (Figure

9).

p3 p2 p1 p0

a6 a5 a4 a3 a2 a1 a0

Program counter (PC)

PCH

Specifying

page

PCL

Specifying address

Specifying bit position

Set

Port D output latch

X1 X0 Y3 Y2 Y1 Y0

Data pointer (DP)

Specifying

RAM digit

Specifying RAM file

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