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HD74LS09FPEL Scheda tecnica(PDF) 1 Page - Renesas Technology Corp |
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HD74LS09FPEL Scheda tecnica(HTML) 1 Page - Renesas Technology Corp |
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1 / 5 page ![]() Rev.2.00, Feb.18.2005, page 1 of 4 HD74LS09 Quadruple 2-Input Positive AND Gates (with Open Collector Outputs) REJ03D0395–0200 Rev.2.00 Feb.18.2005 Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS09P DILP-14 pin PRDP0014AB-B (DP-14AV) P — HD74LS09FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement (Top view) VCC 4B 4A 4Y 3A 3B 1A GND 1B 1Y 2A 2B 2Y 3Y 1 2 3 4 5 6 7 14 8 9 10 11 12 13 Circuit Schematic (1/4) A 8k 20k 4.5k VCC GND Y Output Inputs 10k B |
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