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HD74LS48P Scheda tecnica(PDF) 1 Page - Renesas Technology Corp |
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HD74LS48P Scheda tecnica(HTML) 1 Page - Renesas Technology Corp |
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1 / 7 page ![]() Rev.3.00, Jul.22.2005, page 1 of 6 HD74LS48 BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs) REJ03D0411–0300 Rev.3.00 Jul.22.2005 HD74LS48 features active high outputs for driving lamp buffers. This circuit has full ripple blanking input / output controls and a lamp test input. Display patterns for BCD input counts above 9 are unique symbols to authenticate input conditions. This circuit incorporates automatic leading and / or trailing-edge zero-blanking control (RBI and RBO). Lamp test (LT) of these types may be performed at any time when the BI / RBO node is at a high level. It contains an overriding blanking input (BI) which can be used to control the lamp intensity be pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL or DTL logic outputs. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS48P DILP-16 pin PRDP0016AE-B (DP-16FV) P — Pin Arrangement (Top view) VCC GND B C Lamp Test BI/RBO RBI D A f g b a c d e 15 16 1 2 3 4 5 6 7 14 8 9 10 11 12 13 Outputs Inputs Inputs B C D A RBI BI/RBO LT f g d e c b a |
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