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HD151TS207SS Scheda tecnica(PDF) 11 Page - Renesas Technology Corp |
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HD151TS207SS Scheda tecnica(HTML) 11 Page - Renesas Technology Corp |
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11 / 38 page ![]() HD151TS207SS Rev.1.00, Apr.25.2003, page 11 of 38 I 2C Controlled Register Bit Map (cont.) Byte7 Vendor Identification Register Bit Description Contents Type Default Note 7 Revision Code Bit3 Vendor Specific R 0 6 Revision Code Bit2 Vendor Specific R 0 5 Revision Code Bit1 Vendor Specific R 0 4 Revision Code Bit0 Vendor Specific R 1 3 Vendor ID Bit3 Vendor Specific R 1 2 Vendor ID Bit2 Vendor Specific R 1 1 Vendor ID Bit1 Vendor Specific R 1 0 Vendor ID Bit0 Vendor Specific R 1 Byte8 Read Back Byte Count Register Bit Description Contents Type Default Note 7 Read back byte count Bit7 RW 0 6 Read back byte count Bit6 RW 0 5 Read back byte count Bit5 RW 0 4 Read back byte count Bit4 RW 1 3 Read back byte count Bit3 RW 1 2 Read back byte count Bit2 RW 1 1 Read back byte count Bit1 RW 1 0 Read back byte count Bit0 Writing to this register will configure byte Count and how many bytes will be read back. Default is 1Ehex = 30 bytes. RW 0 |
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