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3886 Scheda tecnica(PDF) 39 Page - Renesas Technology Corp |
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3886 Scheda tecnica(HTML) 39 Page - Renesas Technology Corp |
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39 / 111 page ![]() 38 3886 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS [Data Bus Buffer Status Register 0, 1 (DBBSTS0, DBBSTS1)] 002916, 002C16 The data bus buffer status register 0, 1 consist of eight bits. Bits 0, 1, and 3 are read-only bits and indicate the condition of the data bus buffer. Bits 2, 4, 5, 6, and 7 are user definable flags which can be set by program, and can be read/written. This regis- ter can be read from the host CPU when the A0 pin is set to “H” only. •Bit 0: Output buffer full flag OBF0, OBF1 When writing data to the output data bus buffer, these flags are set to “1”. When reading the output data bus buffer from the host CPU, these flags are cleared to “0”. •Bit 1: Input buffer full flag IBF0, IBF1 When writing data from the host CPU to the input data bus buffer, these flags are set to “1”. When reading the input data bus buffer from the slave CPU side, these flags are cleared to “0”. •Bit 3: A0 flag A00, A01 When writing data from the host CPU to the input data bus buffer, the level of the A0 pin is latched. [Input Data Bus Buffer Register 0, 1 (DBBIN0, DBBIN1)] 002816, 002B16 Data on the data bus is latched to DBBIN by writing request from the host CPU. Data of DBBIN can be read from the data bus buffer registers (address 002816 or 002B16) on SFR. [Output Data Bus Buffer Register 0, 1 (DBBOUT0, DBBOUT1)] 002816, 002B16 When writing data to the data bus buffer registers (address 002816 or 002B16) on SFR, data is set to DBBOUT. Data of DBBOUT is output from the host CPU to the data bus by performing the read- ing request when the A0 pin is set to “L”. |
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