STV0196 datasheet(3/23 Pages) STMICROELECTRONICS

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PIN LIST

Pin Number

Pin Name

Type

Pin Description

SIGNAL INPUTS

51, 52, 53, 54, 55, 56

I [5..0]

In Phase Component, at twice the symbol frequency (2Fs).

57, 58, 59, 60, 61, 62

Q [5..0]

In Quadrature Component, at twice the symbol frequency (2Fs).

M_CLK

Master Clock Input, 2Fs. Sampling Clock of the External A to D Converters.

FRONT END CONTROLS

CLKREC

1 Bit Control Signal for the External CLK VCO. It must be Low-pass Filtered.

AGC

1 Bit Control Signal for the External AGC. It must be Low-pass Filtered.

D60

M_CLK Divided by 60

SIGNAL OUTPUTS

26, 25, 24, 23,

22, 21, 20, 19

D [7..0]

Output Data

CK_OUT

Output Byte Clock

STR_OUT

Output Synchronization Byte Signal

D/P

Data/Parity Signal

ERROR

Output Error Signal. Set in Case of uncorrected Block.

2C MICRO INTERFACE

SCL

Serial Clock

SDA

I/O

Serial Data Bus

OTHER

MODE

0 = Mode A, 1 = Mode B

1, 2, 5, 6, 13, 14, 15,

16, 17, 18, 63, 64

TEST

Reserved for Manufacturing Test. It must remain unconnected

3, 7, 9, 11, 28, 32,

37, 41, 42, 49

VSS

Ground References

4, 8, 10, 12, 27,

31, 38, 43, 45, 50

VDD

3.3V Supply

NRES

Negative Reset

VITERBI DECODER

DEINTERLEAVER

REED SOLOMON DECODER

ENERGY DESCRAMBLER

NYQUIST

FILTER

DEROTATOR

AGC

LOCK

INDICATOR

DCO

TIMING

RECOVERY

CARRIER

OFFSET

MEASURE

CARRIER PHASE

TRACKING LOOP

DIVIDE BY 60

I2C BUS

INTERFACE

AGC

D/P

ERROR

STR_OUT

CK_OUT

I[5...0]

Q[5...0]

CLKREC

D60

M_CLK

SCL

SDA

MODE

D[7..0]

STV0196B

C/N

INDICATOR

BLOCK DIAGRAM

STV0196B

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