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HD74HC77P Scheda tecnica(PDF) 1 Page - Renesas Technology Corp |
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HD74HC77P Scheda tecnica(HTML) 1 Page - Renesas Technology Corp |
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1 / 7 page ![]() Rev.2.00, Oct 06, 2005 page 1 of 6 HD74HC77 4-bit Bistable Latch REJ03D0552-0200 (Previous ADE-205-424) Rev.2.00 Oct 06, 2005 Description The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high. Features • High Speed Operation: t pd (D to Q) = 12 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: V CC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: I CC (static) = 2 µA max (Ta = 25°C) • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74HC77P DILP-14 pin PRDP0014AB-B (DP-14AV) P — HD74HC77FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP EL (2,000 pcs/reel) HD74HC77RPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs Output Data Enable G Q L H L H H H X L No change H : High level L : Low level X : Irrelevant |
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