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M35061 Scheda tecnica(PDF) 7 Page - Renesas Technology Corp |
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M35061 Scheda tecnica(HTML) 7 Page - Renesas Technology Corp |
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7 / 40 page ![]() 6 SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS M35061-XXXSP/FP MITSUBISHI MICROCOMPUTERS REGISTERS DESCRIPTION VS HS 1 bit weights 1 clock. (1) Address 2A816 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Status DA 0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 14 15 16 17 Register VP0 VP1 VP2 VP3 VP4 VP5 VP6 VP7 HP0 HP1 HP2 HP3 HP4 HP5 HP6 HP7 HP8 TEST10 TEST11 TEST0 TEST1 TEST2 TEST3 — Contents Function If VS is the vertical display start location, If HS is the horizontal display start location, H: Cycle with the horizontal synchronizing pulse T: Cycle with the display clock Test mode (Must be cleared to 0.) Must be cleared to 0. Remarks The vertical start location is specified using the 8 bits from VP7 to VP0. VP7 to VP0 < 1416 are not available. The horizontal start location is specified using the 9 bits from HP8 to HP0. HP8 to HP0 < 1916 are not available. 7 n=0 8 n=0 HOR Character displaying area TV screen __ Note: The mark around the status value means the reset status by the “L” level is input to AC pin. VS = H ✕ ( Σ 2n VPn ) HS = T ✕ ( Σ 2n HPn + 9 ) |
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