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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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R8C2K Scheda tecnica(PDF) 75 Page - Renesas Technology Corp |
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R8C2K Scheda tecnica(HTML) 75 Page - Renesas Technology Corp |
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75 / 471 page  R8C/2K Group, R8C/2L Group 7. Programmable I/O Ports Rev.1.10 Dec 21, 2007 Page 58 of 450 REJ09B0406-0110 7.4 Port settings Tables 7.4 to 7.36 list the port settings. X: 0 or 1 NOTE: 1. Pulled up by setting the PU00 bit in the PUR0 register to 1. X: 0 or 1 NOTES: 1. Pulled up by setting the PU00 bit in the PUR0 register to 1. 2. N-channel open drain output by setting the NCH bit in the U2C0 register to 1. 3. To use the UART2, set the PINSR1 register to “70h”. X: 0 or 1 NOTES: 1. Pulled up by setting the PU00 bit in the PUR0 register to 1. 2. To use the UART2, set the PINSR1 register to “70h”. X: 0 or 1 NOTES: 1. Pulled up by setting the PU00 bit in the PUR0 register to 1. 2. To use the UART2, set the PINSR1 register to “70h”. Table 7.4 Port P0_0/AN7 Register PD0 ADCON0 Function Bit PD0_0 CH2 CH1 CH0 ADGSEL0 Setting Value 0 XXX X Input port(1) 1 X X X X Output port 0 1110 A/D converter input (AN7) Table 7.5 Port P0_1/AN6/TXD2 Register PD0 ADCON0 U2MR Function Bit PD0_1 CH2 CH1 CH0 ADGSEL0 SMD2 SMD1 SMD0 Setting Value 0 X XX XX XX Input port(1) 1 X XX XX XX Output port XX XX X 0 0 1 TXD2 output(2, 3) 1 0 1 10 0 1 1 0 0 X X X A/D converter input (AN6) Table 7.6 Port P0_2/AN5/RXD2 Register PD0 ADCON0 Function Bit PD0_2 CH2 CH1 CH0 ADGSEL0 Setting Value 0 XXX X Input port(1) 1 X X X X Output port 0 1010 A/D converter input (AN5) 0 XXX X RXD2 output(2) Table 7.7 Port P0_3/AN4/CLK2 Register PD0 ADCON0 U2MR Function Bit PD0_3 CH2 CH1 CH0 ADGSEL0 SMD2 SMD1 SMD0 CKDIR Setting Value 0 X X XXX XXX Input port(1) 1 X X X X Other than 001b X Output port 0 X X XXX XX 1 CLK2 (external clock) input(2) XX XX X 0 0 1 0 CLK2 (internal clock) output(2) 01 000 X X X X A/D converter input (AN4) |
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