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H838532H Scheda tecnica(PDF) 257 Page - Renesas Technology Corp |
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H838532H Scheda tecnica(HTML) 257 Page - Renesas Technology Corp |
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257 / 508 page ![]() Section 9 Timers Rev. 1.00 May 30, 2008 Page 237 of 484 REJ09B0436-0100 Figure 9.5 shows an example in which TCF is read when it contains H'AAFF. Read upper byte CPU (H'AA) TEMP (H'FF) TCFH (H'AA) TCFL (H'FF) Bus interface Module data bus Read lower byte CPU (H'FF) TEMP (H'FF) TCFH (AB)* TCFL (00)* Bus interface Module data bus Note: * H'AB00 if counter has been updated once. Figure 9.5 Read Access to TCF (TCF → CPU) 9.4.4 Operation Timer F is a 16-bit counter that increments on each input clock pulse. The timer F value is constantly compared with the value set in output compare register F, and the counter can be cleared, an interrupt requested, or port output toggled, when the two values match. Timer F can also function as two independent 8-bit timers. |
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