 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
H838532H Scheda tecnica(PDF) 323 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H838532H Scheda tecnica(HTML) 323 Page - Renesas Technology Corp |
|
|
323 / 508 page  Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 303 of 484 REJ09B0436-0100 Bit 1: Reserved (MPBR) Bit 1 is reserved. It is a read-only bit and cannot be modified. Bit 0: Reserved (MPBT) Bit 0 is reserved. The write value should always be 0. 10.2.8 Bit Rate Register (BRR) Bit Initial value Read/Write 7 BRR7 1 R/W 6 BRR6 1 R/W 5 BRR5 1 R/W 4 BRR4 1 R/W 3 BRR3 1 R/W 0 BRR0 1 R/W 2 BRR2 1 R/W 1 BRR1 1 R/W BRR is an 8-bit register that designates the transmit/receive bit rate in accordance with the baud rate generator operating clock selected by bits CKS1 and CKS0 of the serial mode register (SMR). BRR can be read or written by the CPU at any time. BRR is initialized to H'FF upon reset, and in standby, module standby, or watch mode. Table 10.3 shows examples of BRR settings in asynchronous mode. The values shown are for active (high-speed) mode. |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
