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H8S/2223 Scheda tecnica(PDF) 58 Page - Renesas Technology Corp |
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H8S/2223 Scheda tecnica(HTML) 58 Page - Renesas Technology Corp |
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58 / 1071 page ![]() Rev. 5.00 Aug 08, 2006 page lviii of lxxxvi 14.6 Usage Notes ...................................................................................................................... 541 14.6.1 Setting Module Stop Mode .................................................................................. 541 14.6.2 TxRDY Flag and Underrun Error ........................................................................ 541 14.6.3 RxRDY Flag and Overrun Error.......................................................................... 542 14.6.4 Error Flag s in the IETEF..................................................................................... 542 14.6.5 Error Flags in IEREF ........................................................................................... 543 14.6.6 Notes on Slave Transmission............................................................................... 544 14.6.7 Notes on DTC Specification ................................................................................ 545 14.6.8 Error Handling in Transmission........................................................................... 545 14.6.9 Power-Down Mode Operation ............................................................................. 546 14.6.10 Notes on Middle-Speed Mode ............................................................................. 546 14.6.11 Notes on Register Access..................................................................................... 546 Section 15 Serial Communication Interface (SCI) .................................................... 547 15.1 Features............................................................................................................................. 547 15.2 Input/Output Pins .............................................................................................................. 551 15.3 Register Descriptions ........................................................................................................ 551 15.3.1 Receive Shift Register (RSR) .............................................................................. 552 15.3.2 Receive Data Register (RDR) .............................................................................. 552 15.3.3 Transmit Data Register (TDR)............................................................................. 552 15.3.4 Transmit Shift Register (TSR) ............................................................................. 553 15.3.5 Serial Mode Register (SMR)................................................................................ 553 15.3.6 Serial Control Register (SCR).............................................................................. 557 15.3.7 Serial Status Register (SSR) ................................................................................ 563 15.3.8 Smart Card Mode Register (SCMR) .................................................................... 570 15.3.9 Bit Rate Register (BRR) ...................................................................................... 571 15.3.10 Serial Expansion Mode Register (SEMR_0) ....................................................... 581 15.4 Operation in Asynchronous Mode .................................................................................... 585 15.4.1 Data Transfer Format........................................................................................... 585 15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode 587 15.4.3 Clock.................................................................................................................... 588 15.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 589 15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................ 590 15.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 592 15.5 Multiprocessor Communication Function......................................................................... 596 15.5.1 Multiprocessor Serial Data Transmission ............................................................ 597 15.5.2 Multiprocessor Serial Data Reception ................................................................. 599 15.6 Operation in Clocked Synchronous Mode ........................................................................ 602 15.6.1 Clock.................................................................................................................... 602 15.6.2 SCI Initialization (Clocked Synchronous Mode) ................................................. 602 |
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