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SH7014 Scheda tecnica(PDF) 158 Page - Renesas Technology Corp |
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SH7014 Scheda tecnica(HTML) 158 Page - Renesas Technology Corp |
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158 / 754 page ![]() 8. Bus State Controller (BSC) Rev.5.00 Sep. 27, 2007 Page 124 of 716 REJ09B0398-0500 8.3.2 Wait State Control The number of wait states inserted into ordinary space access states can be controlled using the WCR settings (figure 8.4). The specified number of Tw cycles are inserted as software wait cycles at the timing shown in figure 8.4. T1 TW CK Read Write Address CSn RD Data WRx Data T2 Figure 8.4 Wait Timing of Ordinary Space Access (Software Wait Only) When the wait is specified by software using WCR, the wait input WAIT signal from outside is sampled. Figure 8.5 shows the WAIT signal sampling. The WAIT signal is sampled at the clock rise one cycle before the clock rise when T w state shifts to T2 state. |
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