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HD6433636SW Scheda tecnica(PDF) 60 Page - Renesas Technology Corp |
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HD6433636SW Scheda tecnica(HTML) 60 Page - Renesas Technology Corp |
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60 / 418 page ![]() 46 Reset state Program halt state Exception-handling state Program execution state Reset cleared SLEEP instruction executed Reset occurs Interrupt source Reset occurs Exception- handling request Exception- handling complete Reset occurs Figure 2.15 State Transitions 2.7.2 Program Execution State In the program execution state the CPU executes program instructions in sequence. There are three modes in this state, two active modes (high speed and medium speed) and one subactive mode. Operation is synchronized with the system clock in active mode (high speed and medium speed), and with the subclock in subactive mode. See section 5, Power-Down Modes for details on these modes. 2.7.3 Program Halt State In the program halt state there are four modes: sleep mode, standby mode, watch mode, and subsleep mode. See section 5, Power-Down Modes for details on these modes. 2.7.4 Exception-Handling State The exception-handling state is a transient state occurring when exception handling is started by a reset or interrupt and the CPU changes its normal processing flow. In exception handling caused by an interrupt, SP (R7) is referenced and the PC and CCR values are saved on the stack. For details on interrupt handling, see 3.3, Interrupts. |
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