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HD6433636SW Scheda tecnica(PDF) 118 Page - Renesas Technology Corp |
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HD6433636SW Scheda tecnica(HTML) 118 Page - Renesas Technology Corp |
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118 / 418 page ![]() 104 to 1, and bit TMA3 in TMA is set to 1, a transition is made directly to active (medium-speed) mode via watch mode after the waiting time set in SYSCR1 bits STS2 to STS0 has elapsed. 5.8.2 Direct Transfer Time Time for Direct Transfer from Active (High-Speed) Mode to Active (Medium-Speed) Mode: When a SLEEP instruction is executed in active (high-speed) mode while the SSBY bit in SYSCR1 is cleared to 0, the LSON bit in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is set to 1, and the DTON bit in SYSCR2 is set to 1, a transition is made directly to active (medium-speed) mode. In this case, the time from execution of the SLEEP instruction to the end of interrupt exception handling (the direct transfer time) is given by equation (1) below: Direct transfer time ={ (Number of SLEEP instruction execution states) + (number of internal processing states) } × (t cyc before transition) + (number of interrupt exception handling execution states) × (t cyc after transition) ...................................................................... (1) Example: H8/3637S Series direct transfer time = (2 + 1) × 2t osc + 14 × 16tosc = 230tosc Legend: t osc: OSC clock cycle time t cyc: System clock (ø) cycle time Time for Direct Transfer from Active (Medium-Speed) Mode to Active (High-Speed) Mode: When a SLEEP instruction is executed in active (medium-speed) mode while the SSBY bit in SYSCR1 is cleared to 0, the LSON bit in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is cleared to 0, and the DTON bit in SYSCR2 is set to 1, a transition is made directly to active (high-speed) mode. In this case, the time from execution of the SLEEP instruction to the end of interrupt exception handling (the direct transfer time) is given by equation (2) below: Direct transfer time ={ (Number of SLEEP instruction execution states) + (number of internal processing states) } × (t cyc before transition) + (number of interrupt exception handling execution states) × (t cyc after transition) ...................................................................... (2) Example: H8/3637S Series direct transfer time = (2 + 1) × 16t osc + 14 × 2tosc = 76tosc Legend: t osc: OSC clock cycle time t cyc: System clock (ø) cycle time |
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