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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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HD6433636SW Scheda tecnica(PDF) 208 Page - Renesas Technology Corp |
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HD6433636SW Scheda tecnica(HTML) 208 Page - Renesas Technology Corp |
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208 / 418 page  194 9.4.5 Application Notes Input Clock Switching and TCG Operation: Depending on when the input clock is switched, there will be cases in which TCG is incremented in the process. Table 9.11 shows the relation between internal clock switchover timing (selected in bits CKS1 and CKS0) and TCG operation. If an internal clock (derived from the system clock ø or subclock ø SUB) is used, an increment pulse is generated when a falling edge of the internal clock is detected. For this reason, in a case like No. 3 in table 9.11, where the clock is switched at a time such that the clock signal goes from high level before switching to low level after switching, the switchover is seen as a falling edge to generate the count clock, causing TCG to be incremented. Table 9.11 Internal Clock Switching and TCG Operation No. Clock Levels Before and After Modifying Bits CKS1 and CKS0 TCG Operation 1 Goes from low level to low level N +1 Clock before switching Clock after switching Count clock TCG CKS bits modified N 2 Goes from low level to high level N +1 N +2 Clock before switching Clock after switching Count clock TCG CKS bits modified N |
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