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HD6433636SW Scheda tecnica(PDF) 217 Page - Renesas Technology Corp |
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HD6433636SW Scheda tecnica(HTML) 217 Page - Renesas Technology Corp |
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217 / 418 page ![]() 203 Bus interface CPU [H'AA] TEMP [H'AA] TLYH [ ] TLYL [ ] Module internal data bus When writing the upper byte CPU [H'55] TEMP [H'AA] TLYH [H'AA] TLYL [H'55] Module internal data bus When writing the lower byte Bus interface Figure 9.16 TLY Write Operation (CPU → TLY) Read Access: When the upper byte is read, the upper-byte data is sent directly to the CPU, and the lower byte is loaded into TEMP. Next when the lower byte is read, the lower byte in TEMP is sent to the CPU. Figure 9.17 shows a TCY read operation when H'AAFF is read from TCY. |
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