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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SH7052 Scheda tecnica(PDF) 342 Page - Renesas Technology Corp |
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SH7052 Scheda tecnica(HTML) 342 Page - Renesas Technology Corp |
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342 / 919 page  316 The CYLR registers can only be accessed by a word read or write. The CYLR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode and software standby mode. For details of the CYLR, BFR, and DTR registers, see section 10.3.9, PWM Timer Function. 10.2.23 Buffer Registers (BFR) The buffer registers (BFR) are 16-bit registers. The ATU-II has eight buffer registers, four each in channels 6 and 7. Channel Abbreviation Function 6 BFR6A to BFR6D 16-bit PWM buffer registers 7 BFR7A to BFR7D Buffer register (BFR) value is transferred to duty register (DTR) on compare-match of corresponding cycle register (CYLR) Buffer Registers (BFR6A to BFR6D, BFR7A to BFR7D) Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W The BFR registers are 16-bit readable/writable registers that store the value to be transferred to the duty register (DTR) in the event of a cycle register (CYLR) compare-match. The BFR registers can only be accessed by a word read or write. The BFR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode and software standby mode. |
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