SH7052 datasheet(581/919 Pages) RENESAS

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15.3.7

Interrupt Interface

There are 12 interrupt sources for each HCAN channel. Four independent interrupt vectors are

assigned to each channel. Table 15.5 lists the HCAN interrupt sources.

With the exception of the power-on reset processing vector (IRR0), these sources can be masked.

Masking is implemented using the mailbox interrupt mask register (MBIMR) and interrupt mask

Table 15.5

HCAN Interrupt Sources

Channel

IPR Bits

Vector

Number IRR Bit

Description

HCAN

IPRL

(11 to 8)

ERS

220

IRR5

Error passive interrupt (TEC

≥ 128 or REC ≥

128)

(initial

value)

IRR6

Bus off interrupt (TEC

≥ 256)

OVR

221

IRR0

Power-on reset processing interrupt

IRR2

Remote frame reception interrupt

IRR3

Error warning interrupt (TEC

≥ 96)

IRR4

Error warning interrupt (REC

≥ 96)

IRR7

Overload frame transmission interrupt/bus off

recovery interrupt (11 recessive bits

× 128

times)

IRR9

Unread message overwrite interrupt

IRR12

HCAN sleep mode CAN bus operation

interrupt

RM0

222

IRR1

Mailbox 0 message reception interrupt

IRR1

Mailbox 1 to 15 message reception interrupt

SLE0

223

IRR8

Message transmission/cancellation interrupt

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