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595

Pin Functions in RAM Monitor Mode

Description

AUDCK

The external clock input pin. Input the clock to be used for debugging to this pin.

The input frequency must not exceed 1/4 the operating frequency. When no

connection is made, this pin is pulled up internally.

AUDSYNC

Do not assert this pin until a command is input to AUDATA from off-chip and the

necessary data can be prepared. See the protocol description for details. When

no connection is made, this pin is pulled up internally.

AUDATA3 to

AUDATA0

When a command is input from off-chip, data is output after Ready reception.

Output starts when

AUDSYNC is negated. See the protocol description for

details. When no connections are made, these pins are pulled up internally.

17.3

Branch Trace Mode

17.3.1

Overview

In this mode, the branch destination address is output when a branch occurs in the user program.

Branches may be caused by branch instruction execution or interrupt/exception processing, but no

distinction is made between the two in this mode.

17.3.2

Operation

Operation starts in branch trace mode when

AUDRST is asserted, AUDMD is driven low, then

AUDRST is negated.

Figure 17.2 shows an example of data output.

While the user program is being executed without branches, the AUDATA pins constantly output

0011 in synchronization with AUDCK.

When a branch occurs, after execution starts at the branch destination address in the PC, the

previous fully output address (i.e. for which output was not interrupted by the occurrence of

another branch) is compared with the current branch address, and depending on the result,

AUDSYNC is asserted and the branch destination address output after 1-clock output of 1000 (in

the case of 4-bit output), 1001 (8-bit output), 1010 (16-bit output), or 1011 (32-bit output). The

initial value of the compared address is H'00000000.

On completion of the cycle in which the address is output,

AUDSYNC is negated and 0011 is

output from the AUDATA pins.

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