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SH7052 Scheda tecnica(PDF) 235 Page - Renesas Technology Corp |
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SH7052 Scheda tecnica(HTML) 235 Page - Renesas Technology Corp |
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235 / 919 page ![]() 209 10.2.3 Timer Control Registers (TCR) The timer control registers (TCR) are 8-bit registers. The ATU-II has 16 TCR registers: two each for channels 1 and 2, one each for channels 3, 4, 5, 8, and 11, two each for channels 6 and 7, and three for channel 9. For details of channel 10, see section 10.2.26, Channel 10 Registers. Channel Abbreviation Function 1 TCR1A, TCR1B Internal clock/external clock/TI10 input clock selection 2 TCR2A, TCR2B 3 TCR3 4 TCR4 5 TCR5 6 TCR6A, TCR6B Internal clock selection 7 TCR7A, TCR7B 8 TCR8 9 TCR9A, TCR9B, TCR9C External clock selection/setting of channel 3 trigger in event of compare-match 11 TCR11 Internal clock/external clock selection Each TCR is an 8-bit readable/writable register that selects whether an internal clock or external clock is used for channels 1 to 5 and 11. For channels 6 to 8, TCR selects an internal clock, and for channel 9, an external clock. When an internal clock is selected, TCR selects the value of φ" further scaled from clock φ' scaled with prescaler register 1 (PSCR1). Scaled clock φ" can be selected, for channels 1 to 8 and 11 only, from φ', φ'/2, φ'/4, φ'/8, φ'/16, and φ'/32 (only φ' is available for channel 0). Edge detection is performed on the rising edge. When an external clock is selected, TCR selects whether TCLKA, TCLKB (channels 1 to 5 and 11 only), TI10 pin input (channels 1 to 5 only), or a TI10 pin input multiplied clock (channels 1 to 5 only) is used, and also performs edge selection. Each TCR is initialized to H'00 by a power-on reset, and in hardware standby mode and software standby mode. |
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