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7220 Scheda tecnica(PDF) 6 Page - Renesas Technology Corp |
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7220 Scheda tecnica(HTML) 6 Page - Renesas Technology Corp |
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6 / 303 page ![]() ii 2. Register diagram The figure of each register structure describes its functions, contents at reset, end attributes as follows: Values immediately after reset release Bit attributes (Note 1) (Note 2) Bits 2: Bit attributes••••••The attributes of control register bits are classified into 3 types : read-only, write-only and read and write. In the figure, these attributes are represented as follows : : Bit in which nothing is assigned Notes 1: Values immediately after reset release 0••••••“0” after reset release 1••••••“1” after reset release ?••••••Indeterminate after reset release ••••••Read enabled ••••••Read disabled R••••••Read ••••••Write enabled ••••••Write disabled ••••••“0” can be set by software, but “1” cannot be set. W••••••Write b7 b6 b5 b4 b3 b2 b1 b0 CPU mode register (CPUM) (CM) [Address FB 16] B After reset RW CPU Mode Register 0, 1 2 3 to 5 0 1 Name Functions Fix these bits to “0.” Fix these bits to “1.” 1 Stack page selection bit (CM2) 1 0: 0 page 1: 1 page 10 0 6, 7 Indeterminate 1 11 RW RW RW RW R — W — V |
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